The push toward 1-megawatt racks is forcing fundamental changes in data center architecture, including cooling, power delivery, rack design, and 3D-IC packaging. Higher rack densities may not be the ...

As AI moves from answering prompts to completing work, infrastructure has to optimize the full workflow around the model.

As AI clusters push beyond rack-scale limits, optical interconnects and circuit switching are reshaping how data centers scale.

Hardware and software development has traditionally been disconnected, creating little opportunity to optimize system-level performance and energy consumption. Development swings between specialized ...

Heterogeneous integration does not simply increase complexity but redistributes where quality must be assured.

HBM is a reliability bottleneck, requiring greater visibility into individual bonds and TSVs, and more sophisticated SI/PI ...

A smaller set of fiber connectors that meet manufacturing test high insertion count will ease the cost burden for all. Test specifications and associated standardized test formats will facilitate data ...

As AI, high-performance computing, cloud workloads, and data-intensive enterprise applications continue to scale, server memory systems are under growing pressure to deliver more bandwidth, higher ...

OpenAI is developing its own AI accelerator using Broadcom. Anthropic is also rumored to be exploring doing its own chip. As the developers of the most popular frontier models, one can expect they’ll ...

Chip security must be designed in from the start, with clear requirements that connect architecture, verification, software, manufacturing, and field deployment. AI is expanding both the scale and ...

Researchers from the University of Hong Kong, Fudan University, and National University of Singapore designed an analog content-addressable memory (CAM) utilizing 2D molybdenum disulfide (MoS 2) flash ...

An imec researcher published a technical paper titled “Bond Front Velocity in Lubrication-Mediated Bonding of Flexible ...