Heterogeneous integration does not simply increase complexity but redistributes where quality must be assured.

HBM is a reliability bottleneck, requiring greater visibility into individual bonds and TSVs, and more sophisticated SI/PI ...

OpenAI is developing its own AI accelerator using Broadcom. Anthropic is also rumored to be exploring doing its own chip. As the developers of the most popular frontier models, one can expect they’ll ...

A smaller set of fiber connectors that meet manufacturing test high insertion count will ease the cost burden for all. Test specifications and associated standardized test formats will facilitate data ...

Researchers from Pohang University of Science & Technology (POSTECH), Korea Institute of Industrial Technology (KITECH), and Texas A&M University developed a process that simultaneously transfers ...

An imec researcher published a technical paper titled “Bond Front Velocity in Lubrication-Mediated Bonding of Flexible ...

Chip security must be designed in from the start, with clear requirements that connect architecture, verification, software, manufacturing, and field deployment. AI is expanding both the scale and ...

AI has pushed security to the forefront, helping attackers find vulnerabilities in chips and the chip industry to defend against them. Security needs to extend throughout a chip’s lifetime, but it’s ...

Modern system-on-chips (SoCs) are no longer built around a single clock and a single reset. Today’s designs integrate hundreds of IP blocks, multiple power domains, software-controlled reset sequences ...

Researchers from MIT, SLAC, Stanford University, and Argonne National Laboratory published a technical paper titled “Spatiotemporal mapping of anisotropic thermal transport in GaN thin films via ...

Many security architectures rely on immutable ROM as the first trusted code executed by a processor. It provides a stable foundation for authenticating the rest of the boot chain, but that same ...