Design And Reuse

JPEG XS in MXF: How China's New UHD Broadcasting Standard Puts Visually Lossless Compression at the Core of 8K Delivery

A newly published UHD World Association standard writes JPEG XS directly into its 8K programme-file requirements — a concrete ...
Design And Reuse

SignatureIP Unveils IP Library for Chiplet-based AI, HPC and Data Center Systems at AI Infra Summit 2026

SignatureIP today announced the general availability of a comprehensive library of Interconnect, Interface and System-on-Chip (SoC) Subsystem IP purpose-built for chiplet-based systems targeting ...
Design And Reuse

Trust Continuity: Securing SoCs and Chiplets from Design to Deployment and Beyond

A secure SoC design is only valuable if its trust model survives every transition: integration, manufacturing, deployment, ...
Design And Reuse

Fraunhofer RISC-V Secure Element Accelerates Secure Chip Development After Successful Silicon Validation

The Fraunhofer RISC-V Secure Element is now available as a licensable security platform for custom systems-on-chip (SoCs), application-specific integrated circuits (ASICs), and chiplets. The silicon ...
Design And Reuse

Silicon Creations Receives 10th Consecutive TSMC OIP Partner of the Year Award for Mixed Signal IP

Silicon Creations, a leading provider of high-performance analog and mixed-signal semiconductor intellectual property (IP), has been recognized as the 2026 TSMC Open Innovation Platform® (OIP) Partner ...
Design And Reuse

Synopsys and Amazon Announce Strategic, Multi-year IP Agreement for Custom Silicon; Collaboration Also Extends to Cloud and AI-Powered Engineering

Strategic engagement to accelerate the engineering of Amazon custom chips and AWS infrastructure using Synopsys' silicon IP and AI-powered engineering software solutions; Multi-ye ...
Design And Reuse

Fraunhofer IPMS hosts workshop on scaling quantum chip production

As superconducting quantum processors approach the 1,000-qubit threshold, a milestone IBM Quantum anticipates reaching by 2029, a critical bo ...
Design And Reuse

Racyics UCIe PHY IP for GlobalFoundries 22FDX reaches silicon

The Racyics® UCIe PHY IP for GlobalFoundries® 22FDX® provides the physical layer for this die-to-die communication. It connects the UCIe Raw Die-to-Die Interface with the electrical mainband and ...
Design And Reuse

Samsung expects its foundry customers to quadruple by 2029

Samsung Electronics said Tuesday that the number of customers for its foundry business could grow roughly fourfold by 2029 compared to 2017. "The number of customers has increased about threefold from ...
Design And Reuse

MIPS and Xcelsa Collaborate to Accelerate Verified, Workload-Optimized Custom Silicon

MIPS processor IP and Xcelsa’s Apex platform help customers move from software and workload requirements to formally verified, different ...
Design And Reuse

BOS Semiconductors Named to Forbes Korea’s "2026 Korea AI 50"

BOS Semiconductors has been named to Forbes Korea’s “2026 Korea AI 50,” recognizing companies contributing to the technologies and infrastructure powering the next generation of artificial ...
Design And Reuse

Can Remote Equipment Monitoring Move Beyond Alerts to Autonomous Action?

As industries evolve by adopting advanced technologies to meet growing market demands, IoT, cloud, and edge computing have ...