Design And Reuse

Enabling the Chiplet Era: T2M Brings Production-Proven, UCIe-Ready Die-to-Die IP for Chiplet SOCs.

T2M, today announced the commercial availability of its partner’s production-proven die-to-die interface IP core, aligned with the emerging UCIe ecosystem. This solution is already validated in mass ...
Design And Reuse

CAST Introduces MAC-SEC-MG IP Core for Secure 10G+ Ethernet SoC Designs

New multi-gigabit MACsec engine provides Ethernet security for 2.5G, 5G, 10G, and higher-bandwidth embedded systems at line ...
Design And Reuse

TSMC Latest Roadmap: A12, A13 for 2029 Without High-NA EUV; A16 Volume Production Delayed to 2027

TSMC outlined its manufacturing technology roadmap through 2029 at its North American Technology Symposium 2026. According to Tom’s Hardware, the company introduced its 1.2nm- and 1.3nm-class ...
Design And Reuse

Atomera Extends Collaboration With Synopsys to Accelerate GaN Modeling in High-Value RF and Power Devices

Atomera’s quantum-engineered MST® films and Synopsys’ TCAD simulation combine to accelerate next-generation GaN device development for RF and power electronics LOS GATOS, Calif.-- Atomera Incorporated ...
Design And Reuse

Ceva’s 5G NTN Modem IP Could Democratize Modems for Satellite Terminals

PentaG-NTN modem IP subsystem, aimed at satellite user terminals supporting low Earth orbit (LEO) and medium Earth orbit (MEO) constellations, at MWC 2026. The soft IP is set to simplify the ...
Design And Reuse

More Control, Less Chaos With Microchip’s New All-in-One DSCs

Microchip recently expanded its dsPIC33A digital signal controller lineup with the dsPIC33AK256MPS306 family of digital signal controllers (DSCs), which target applications that require fast, ...
Design And Reuse

Enabling Memory Choice for Modern AI Systems: Tenstorrent and Rambus Deliver Flexible, Power-Efficient Solutions

As AI workloads continue to diversify, the systems that support them are evolving just as quickly. AI is no longer confined to the hyperscale data center. It is moving to the factory floor, into ...
Design And Reuse

M31 Collaborates with TSMC to Achieve Tapeout of eUSB2V2 on N2P Process, Advancing Design IP Ecosystem

eUSB2V2 on N2P was developed with co-optimization across design, circuit implementation, and physical layout. The goal was to improve performance and power efficiency, while also addressing area ...
Design And Reuse

Infineon joins European quantum pilot lines for quantum chips

Europe is taking a more structured approach to turning quantum research into hardware that can be manufactured at scale, with Infineon positioning itself as one of the industrial players helping that ...
Design And Reuse

EU DARE Project Is Scrambling to Replace Codasip

EU DARE project explores alternatives after Codasip divestment creates uncertainty around roadmap and architectural direction. By Pablo Valerio, EE Times. The European High-Perfor ...
Design And Reuse

Silvaco Partners with ITRI to Support MCU Development and Startup Innovation

Silvaco Group, Inc. (Nasdaq: SVCO, "Silvaco"), a provider of TCAD, EDA software, and SIP solutions that enable semiconductor design and digital twin modeling through AI software and innovation, today ...
Design And Reuse

Rambus Enables Power-Efficient AI Platforms with SOCAMM2 Server Module Chipset

LPDDR-based SOCAMM2 chipset, including new Voltage Regulators and SPD Hub, supports AI data center performance scaling in a low-power, high-bandwidth, compact module form factor First in a planned ...