Chip security must be designed in from the start, with clear requirements that connect architecture, verification, software, manufacturing, and field deployment. AI is expanding both the scale and ...

An imec researcher published a technical paper titled “Bond Front Velocity in Lubrication-Mediated Bonding of Flexible ...

Both approaches scale toward packages as large as 240 mm x 240 mm, with a roadmap extending beyond 12x reticle integration ...

NASA’s lunar network will leverage Delay/Disruption Tolerant Networking to maintain signal integrity between rovers, astronauts, satellites, and more. 4G/5G LTE RF and optical inter-satellite links ...

Compute clusters offer more processing capacity but at the cost of higher power. Software is needed to allocate resources ...

AI integration is accelerating aging in automotive sensors and other components. AI-powered systems must be built through meticulous, advanced model testing, but they also must adapt to future AI ...

As packages get larger and thinner, warpage is becoming a process-control problem rather than a simple flatness spec.

Researchers from MIT, SLAC, Stanford University, and Argonne National Laboratory published a technical paper titled “Spatiotemporal mapping of anisotropic thermal transport in GaN thin films via ...

Explore how designers can build safer, smarter humanoid robots-covering motor control, main compute, zone control, battery management, charging and sensing. Download the application presentation to ...

AI has pushed security to the forefront, helping attackers find vulnerabilities in chips and the chip industry to defend against them. Security needs to extend throughout a chip’s lifetime, but it’s ...