Semiconductor Engineering

Trust, But Verify

We trust designers to do the best they can, but know they cannot be perfect. That's why we verify. When AI gets involved, it ...
Semiconductor Engineering

Photonics Forces A Chiplet Rethink

Thermal drift, stress, electromagnetic coupling, and verification gaps are turning optical integration into a full-system co-design problem rather than a plug-in bandwidth upgrade.
Semiconductor Engineering

Hybrid HBM-HBF Architecture in LLM Inference (University of Oxford)

Researchers at the University of Oxford published a technical paper titled “Hardware-Managed Heterogeneous High-Bandwidth ...
Semiconductor Engineering

Predicting Post-Route PPA from Macro and Standard-Cell Placements (U. of Alberta)

Researchers from University of Alberta published a technical paper titled “PPAPlace: Differentiable Cross-Stage Objectives ...
Semiconductor Engineering

Cycle-Level Simulator for Distributed GPUs For AI Workloads (Purdue)

Researchers from Purdue University published a technical paper titled “Architecting the Next Generation of Asynchronous, ...
Semiconductor Engineering

Programmable Silicon Photonics Filter Enables Continuous Laser Wavelength Tuning (UiT, Stanford)

Researchers at UiT The Arctic University of Norway and Stanford University published a technical paper titled “Intracavity ...
Semiconductor Engineering

Molecular Dynamics Study Explains Aluminum Dopant Activation In 4H-SiC (TU Wien, Silvaco)

Researchers from TU Wien and Silvaco Europe published a technical paper titled “The influence of implantation conditions on ...
Semiconductor Engineering

Ferroelectric Tuning Reduces Optical-Interconnect Stalls In LLM Training (Georgia Tech)

Researchers from Georgia Institute of Technology published a technical paper titled “Thermal Tuning Overhead in Wafer-Scale ...
Semiconductor Engineering

Planning Your AI Design Journey: Start With What You’d Lose

AI is supposed to be the answer to this. But for many teams, the AI conversation stalls before it starts, because it gets ...
Semiconductor Engineering

Sapphire Surface Modification Enables Wafer-Scale 2D Semiconductor Growth (Peking U., CAS et al.)

Researchers from Peking University, Chinese Academy of Sciences et al. published a technical paper titled “Homo-metal-element ...
Semiconductor Engineering

Generative Design Optimizes Liquid-Cooling Channels For 2.5D And 3D Packages (UM-Dearborn)

Researchers from University of Michigan-Dearborn published a technical paper titled “Generative Design of Liquid-Cooling ...
Semiconductor Engineering

Deep Learning Automates Parameter Extraction For 2D Transistors (Stanford, SLAC)

Researchers from Stanford University and SLAC National Accelerator Laboratory published a technical paper titled “Deep ...