Plus, agentic EDA and AI-generated analog layout, small chip fabs, diamond-based defect inspection, large-area nanoimprint ...

The shift from software-defined to AI-defined vehicles raises questions about whether the hardware can keep up.

Because in the age of AI, performance is no longer determined by a single chip itself. It is shaped by how efficiently the ...

Moores Lab AI is betting that chip design AI will only work if it is built around deep semiconductor expertise, not generic ...

As models evolve faster than silicon cycles, chip architects must balance flexible compute, data movement, and ...

Researchers at Carl Zeiss SMT and ASML published a technical paper titled “Hyper-NA: a system with a numerical aperture of at least 0.75.” Abstract Summary: The researchers examine Hyper-NA EUV ...

Researchers at ETH Zürich, CISPA, and New York University published a technical paper titled “Terracotta: Enabling the ...

Increasing power density makes heat, stress, and aging harder to predict, and more critical to address earlier in the design flow.

How complementary inspection and metrology techniques can detect smaller defects and distinguish among a wide range of defect types within a unified workflow.

Test vendors are adapting to changing connector architectures and extreme alignment tolerances as co-packaged optics heads ...

Researchers at the UC Berkeley and FuriosaAI published a technical paper titled “Characterizing High Bandwidth Flash for LLM ...

Ben Mitchel is senior director of product marketing and business development at teradyne, where he leads market strategy and ...